In order to widely generalize the solar cell, it is necessary to provide an inexpensive solar cell. To reduce the cost, study of various techniques is being progressed at present. As one of the various techniques, Japanese Patent Application Laid-Open No. H11-162859 discloses a technique of growing a high-quality silicon layer on a low-cost multicrystalline silicon substrate containing a comparatively large amount of impurities by a liquid phase epitaxial (LPE) growth method to form a solar cell in the silicon layer. It is expected that this technique reduces the substrate cost of the solar cell. Moreover, it is important, for cost reduction, to improve the photoelectric conversion efficiency of the solar cell. Particularly, it is expected to increase current by means of light trapping effect by providing texture structure on a substrate.
In the case of the conventional LPE growth methods, it is generally performed to dip a substrate in a solution containing a growth species and then to lower the temperature of the solution at a constant rate (hereafter referred to as “linear temperature drop” or “linear cooling”), to thereby grow the growth species on the substrate (see, for example, Japanese Patent Application Laid-Open Nos. 61-261292, H03-256324 and H05-82458).
In the case of the conventional linear temperature drop LPE growth method represented by Japanese Patent Application Laid-Open Nos. 61-261292 and H03-256324, because a monocrystalline substrate is used as a substrate, a flat layer is generally grown, with the exception of having a micro-waviness of about 1 μm at most, which is peculiar to the LPE growth method. When applying the conventional linear temperature drop LPE growth method to silicon layer growth on a multicrystalline silicon substrate, it has been found through experiments by the present inventors that a comparatively flat layer is grown when a substrate surface has been made very flat by a method such as CMP. However, when a low-cost solar cell is to be attained, this method is not preferable because polishing a surface of a substrate extremely increases the substrate cost.
Therefore, when a low-cost solar cell is to be attained, it is a practical method to flatten a substrate only by cutting out a substrate from a multicrystalline silicon ingot with a wire saw or the like and etching the cut out member with a mixed acid. However, it has been found through experiments by the present inventors that when growing a silicon layer on a multicrystalline silicon substrate etched with a mixed acid by the linear temperature drop LPE growth method, the following problem occurs.
That is, on one hand, a problem occurs that when the growth time is short, although the degree of layer roughening is comparatively small, a large amount of current cannot be obtained for a finally formed solar cell. On the other hand, when the growth time is long, another problem occurs that although a thick layer is obtained, the degree of layer roughening increases, so that a solar cell is easily shunted (short-circuited) and the fill factor (FF) lowers.
Although the cause of generation of layer roughening has not been clarified, the present inventors believe that the growth rate of a layer slowly increases with time in the case of linear temperature drop and layer roughening becomes remarkable when the growth rate exceeds a threshold. The phenomenon of layer roughening hardly occurs when a substrate is flat. The present inventors believe that when a layer is grown on a substrate with a rough surface at a rate higher than a specific growth rate, step bunching of epitaxial growth is macroscopically actualized. Moreover, it is believed that this phenomenon remarkably appears when the amount of a solution is large and supply of a growth material is comparatively large. That is, the layer roughening hardly occurs when the slide boat method or tipping method is used and the amount of a solution is small, even in the case of using the same temperature profile mentioned above. However, in the case of using the dipping method in which the amount of a solution is comparatively large, although it has advantage to effect LPE growth on a large number of substrates at the same time, layer roughening is liable to occur, so that development of an optimum LPE growth method has been desired.
Incidentally, Japanese Patent Application Laid-Open No. H05-82458 discloses that when heteroepitaxially growing an Hg1-xCdxTe crystal on a sapphire substrate, the temperature drop rate of a melt is decreased with time. In fact, what is disclosed in this patent is to keep the melt temperature (i.e. without temperature drop) after linear temperature drop process in order to prevent mutual diffusion between the sapphire substrate and the HgCdTe layer. Since their LPE utilizes a monocrystalline substrate, surface roughening of an LPE layer hardly occurs. It is apparent that they had no scope to control the LPE layer roughness. On the other hand, our experiment of silicon LPE revealed that LPE process comprising constant melt temperature has curious property. That is, the LPE layer thickness will increase at the beginning but then WILL decrease. This phenomenon is reported in Proceedings of 19th European PVSEC by present authors. Therefore the temperature profile disclosed in the prior art is not suitable for PV use, which requires a certain amount of a layer thickness for generating enough photocurrent.